Sep 12 – 17, 2021
University of Birmingham
Europe/London timezone

A Novel Front-End Amplifier for Gain-less Charge Readout in High-Pressure Gas TPC

Sep 17, 2021, 10:37 AM
Teaching and Learning Building (University of Birmingham)

Teaching and Learning Building

University of Birmingham

Edgbaston Campus University of Birmingham B15 2TT UK
poster Advances in Pixel Detectors and Integration Technologies Poster Session 7 (Detectors for High Radiation and Extreme Environments)


Dr Chaosong Gao (Central China Normal University)


The search for Neutrinoless Double-Beta Decay (0νββ) at tonne-scale and beyond requires techniques that are capable of observing a sharp peak at Qββ in the total beta energy spectrum. A direct charge sensor, Topmetal-S, with only one charge collection electrode on a single sensor and with the intention to tile many such sensors on a large plane, is being developed for 0νββ experiments in a high-pressure gaseous Time Projection Chamber (TPC) without gas-electron avalanche. This scheme eliminates the conventional avalanche fluctuations but demands exceedingly low internal noise on the front-end amplifier to achieve sufficient energy resolution by charge measurement alone.

Given a power consumption and circuitry, the electronic noise of the front-end amplifier is proportional to the input capacitance primarily contributed by the Charge Collection Electrode (CCE), the input metal routing and the input transistor. An exposed hexagon metal with a diameter of 1mm is proposed as the CCE on the topmost layer. Its capacitance with respect to the ground is around 4pF. If the input capacitance is reduced, the electronic noise could be significantly decreased.

A novel front-end amplifier composed of a source-drain follower and a common-source amplifier is proposed. The potential on both the source and drain node of the input transistor follows its gate. Hence the effective input capacitance contributed by the input transistor is significantly reduced. If both the CCE and the input metal routing are also shielded and the shield is coupled to the source or drain node, the input capacitance can be greatly reduced. A test chip with the novel front-end amplifier and the CEE has been designed in a standard CMOS 130nm process and is being manufactured. The simulation shows that the equivalent noise charge is less than 30e-.

In the conference, we will present the detailed design and preliminary test results.

Nationality Chinese
Your name Chaosong Gao
Institute Central China Normal University
Title Dr

Primary authors

Mr Danfeng Li (Central China Normal University) Prof. Xiangming Sun (Central China Normal University) Prof. Guangming Huang (Central China Normal University)


Dr Chaosong Gao (Central China Normal University)

Presentation materials