Sep 2 – 6, 2019
Europe/Zurich timezone

VICE++: a building block of the debug and quality control systems for CMS ECAL upgrade on-detector electronics

Sep 5, 2019, 4:55 PM
Poster Production, Testing and Reliability Posters


Mr Alexander Singovski


VICE++ is a FPGA-based unit with interfaces compatible with the upgrade Very
Front End (VFE) and Front End (FE) boards. Once equipped with the appropriate firmware, it act as a test unit for debugging and tuning of different versions
of VFE and FE prototypes, and as a building block of the QC/QA systems for VFE and FE production. FPGA power allow run lpGBT-FPGA firmware, hence the unit can emulate some functionality of the on-detector electronics for the off-detector electronics tests. The board can be used to evaluate the quality of the data transactions from the FE to the Back-End electronics.


VICE (VFE Interface Converting Electronics) is a small FPGA-based interface board, designed at early stage of the CME ECAL upgrade on-detector electronics development to match the legacy Very Front End (VFE) output – single ended parallel LVDS, to GBTx – based Front End (FE) prototype input – serial bipolar SLVS-400. The board happened to be very useful, much beyond the simple interface domain as it allowed to decouple VFE and FE prototypes testing, providing all necessary test functions.

VICE++ is the more powerful extended version of this board, designed for the next stage of ECAL on-detector electronics prototypes: CATIA & Lite-DTU – based VFE with 160MHz ADC sampling, and lpGBT – based FE with 1280Mb/s s-links and 10.24 Gb/s serial links.
The board is designed to provide all data, clock, and control signals for VFE prototypes on one side and FE prototypes on the other. It contains two fast optical links to host computer, running up to 10.3Gb/s for the data readout and control.
Being equipped with the appropriate firmware, it can emulate most of the functionalities of the FE card for the VFE prototypes tests, as well as VFE card for the FE prototypes. It has also capacity to run the full speed readout of one Lite-DTU without compression to debug and optimize the data compression procedure.
FPGA is powerful enough to run lpGBT-FPGA firmware, hence the board can also emulate large fraction of the on-detector electronics functionality for the upgrade off-detector electronics (BCP) tests.
Presentation will describe design of the VICE++ board and different application for the debugging and testing of all upgrade ECAL electronics components. It will also address the VICE++ - based design of the Quality Control and Quality Assurance systems for the VFE and FE cards mass production.

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