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Vertex and Tracking Detector R&D for CLIC

Dec 15, 2019, 12:00 PM
20m
Sun: B1F-Meeting rooms#4-6; Mon-Wed: B2F-RAN (International Conference Center Hiroshima)

Sun: B1F-Meeting rooms#4-6; Mon-Wed: B2F-RAN

International Conference Center Hiroshima

Peace Memorial Park, Hiroshima-shi
ORAL Pixel sensors for tracking Session2

Speaker

Magdalena Munker (CERN)

Description

The physics aims at the proposed future CLIC high-energy linear e+e- collider pose challenging demands on the performance of the detector system. Precise hit-time tagging with ~5 ns resolution is required for the vertex and tracking detectors, to mitigate the impact of beam-induced background on the measurement accuracy. Moreover, a low mass of ~0.2% X0 per layer for the vertex and ~1% X0 per layer for the tracker is needed, combined with a single-plane spatial resolution of a few micrometers. To address these requirements, an all silicon vertex and tracking system is foreseen at CLIC. To this end, a broad R&D program on new silicon detector technologies is being pursued. For the ultra-light vertex detector, different small pitch (25 um) hybrid technologies with innovative sensor concepts are explored. A dedicated 65 nm readout chip (CLICpix2) has been developed and interconnected via fine pitch bump-bonding to thin planar sensors. Furthermore, alternative interconnects such as bonding using anisotropic conductive films (ACF) are explored. Adapted to the low duty cycle of CLIC, pulsed power operation has been implemented in CLICpix2 and experimentally tested. Moreover, various Silicon On Insulator (SOI) test chips are under study. For the large-scale silicon tracker, fully monolithic CMOS technologies are considered. CMOS sensors with a large collection electrode have been extensively studied in various test-beam campaigns. Using 3D TCAD simulations, innovative sensor concepts have been developed for CMOS sensors with a small collection electrode, and implemented in various prototype chips targeting CLIC and other future projects. A dedicated tracker prototype chip using a 180 nm CMOS process with a high-resistivity epitaxial layer and an innovative sub-pixel segmentation scheme has recently been produced and is currently under evaluation. To predict the performance of the various prototype technologies, a fast and versatile Monte Carlo Simulation Tool (Allpix-Squared) has been developed. This contribution gives an overview of the R&D program for the CLIC vertex and tracking system, highlighting new results from measurements and simulations of recent prototypes.

Submission declaration Original and unpublished

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