Development of monolithic SOI pixel sensors capable of fine measurements of space and time

14 Dec 2019, 14:08
1m
POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6 (International Conference Center Hiroshima)

POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6

International Conference Center Hiroshima

Peace Memorial Park, Hiroshima-shi
POSTER Pixel sensors for imaging POSTER

Speaker

Hitoshi Murayama (University of Tsukuba )

Description

Keywords: SOI monolithic pixel, SOFIST, 3D
 We are developing a monolithic pixel sensor SOFIST using a 0.2 um FD-SOI (Fully depleted silicon-on-insulator) technology for the ILC vertex detector. Adopted is a double SOI wafer manufacturing technology that two buried oxide layers are formed on a high resistive sensor wafer and MOSFETs are formed thereon. Advantages such as low noise due to small parasitic capacitance, small sensor material and radiation resistance against SEE are realized as an SOI monolithic sensor. Superior radiation resistance against TID of ~1MGy has also been demonstrated.
 SOFIST (SOi FIne measurement of Space and Time) is designed to record information of the charge and time of the hit pixels, and we aim to achieve 3 um position resolution and identify ultimately the ILC beam bunches of 554 ns separation. In the previous study, we have demonstrated that SOFIST ver.1 achieved an intrinsic position resolution of 1.2-1.4 um for pixel size of 20×20 um depending on the depletion depths and 8-bit column ADC or 12-bit external ADCs. Also, SOFIST-v2 that has implemented a circuit to record the time achieved a time resolution of 1.55 us using a ramping voltage range of 0-1 V corresponding to a time interval of 0-0.5 ms.
 In this presentation, we report the SOFIST-v3 performance evaluated using 120 GeV proton beam, reading multi-hit, and the status of SOFIST-v4 development. SOFIST-v3 includes the full circuits to read out the charge and time in each pixel of 30×30 um pixel size. Additionally, it was also implemented multi-memory that enable to read out multi-hit. The same functionality is to be realized in SOFIST-v4 with 20×20 um pixel size where the circuits implemented separately in two chips are stacked three-dimensionally using Au micro-bumps.

Submission declaration Original and unpublished

Primary author

Hitoshi Murayama (University of Tsukuba )

Co-authors

Kazuhiko Hara (University of Tsukuba ) Hiroki Yamauchi (University of Tsukuba ) Ryuhei Abe (University of Tsukuba ) Shikie iwanami (University of Tsukuba ) Kevin Watanabe (University of Tsukuba ) Yui Okada (University of Tsukuba ) Toru Tsuboyama (KEK) Yasuo Arai (KEK) Toshinobu Miyoshi (KEK) Prof. Ikuo Kurachi (KEK) Junji Haba (KEK) Manabu Togawa (KEK) Yoichi Ikegami (KEK) Ryutaro Nishimura (KEK) Shun Ono (KEK) Akimasa Ishikawa (KEK) T-H Li (Tohoku University) Miho Yamada (Tokyo Metropolitan College of Industrial Technology)

Presentation materials