Hodoscope with Timepix Detectors for PilsenCube2 Cubesat

Dec 14, 2019, 3:17 PM
1m
POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6 (International Conference Center Hiroshima)

POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6

International Conference Center Hiroshima

Peace Memorial Park, Hiroshima-shi
POSTER Applications in astrophysics POSTER

Speaker

Ondřej Urban

Description

This contribution describes design of Timepix-based hodoscope for cubesat applications, such as PilsenCube2, developed by the University of West Bohemia. This hardware platform consists of two Timepix detectors with silicon 500µm sensors, placed in face-to-face arrangement and rotated relative to each other by 90°, forming a telescope set-up. A copper separator is placed between two sensor layers to distinguish electrons and protons. Besides that, it helps to dissipate heat produced by both detectors. The payload hardware and firmware is designed to support single detector operation as well as dual detector operation mode, in which particle coincidence detection is possible.
The hodoscope electronic has been designed with respect to harsh radiation environment present in space. Therefore radiation hardened components such as the flash-based FPGA (Microsemi Smartfusion2 SoC device) and radiation hardened voltage regulators are used.
The device implements independent power supplies, including bias high voltage supply (operating up to 250 V) and auxiliary threshold reference DAC for each Timepix ASIC (sensor layer). All Timepix power supplies can be controlled independently, with the power-control module connected with the APB (Advanced Peripheral Bus) to the microcontroller subsystem (MSS). Considering highly limited achievable data throughput between the cubesat and the ground control station, enhanced on-board data processing has been developed in order to reduce the size of transmitted data. Therefore the original FITPix protocol has been modified in order to allow full integration within the SmartFusion2 SoC to maximally exploit performance of the Cortex-M3 microprocessor.

Submission declaration Original and unpublished

Primary authors

Co-authors

Pavel Fiala Petr Burian (Czech Technical University (CZ)) Vjaceslav Georgiev (University of West Bohemia (CZ)) Dr Libor Poláček Mr Pavel Broulím Benedikt Bergmann (Czech Technical Universtity in Prague)

Presentation materials