12–14 Jun 2019
Lancaster University
Europe/London timezone

Fast calculation of capacitances in planar pixel and strip silicon sensors

13 Jun 2019, 13:50
20m
Cavendish Lecture Theatre, Faraday Building (Lancaster University)

Cavendish Lecture Theatre, Faraday Building

Lancaster University

Coffee and lunch breaks in the Foyer of the Physics building.

Speaker

Dimitrios Loukas (Nat. Cent. for Sci. Res. Demokritos (GR))

Description

We present a program for fast calculation of capacitances in planar silicon pixel (strip) sensors, based on a 3D (2D) numerical solution of the Laplace equation. A comparison between calculated capacitances and measurements on silicon strip sensors, along with simulation results obtained with the TCAD Sentaurus suite are presented. The validity of 2D calculations is checked with measurements on a Multi-Geometry Silicon Strip Detector (MSSD) developed as a test structure during the CMS HPK campaign toward the specifications of silicon sensors for the CMS Phase-II Tracker. The agreement between calculations and measurements is ~20%, while CPU time for a typical 2 GHz, 4 Core processor is below 5 min. In addition, our work includes calculations for various configurations of pixel geometry. The program is a useful tool for fast estimation of interstrip, interpixel and backplane capacitances before an embarkation to more sophisticated programs is launched.

Primary authors

Panagiotis Assiouras (Nat. Cent. for Sci. Res. Demokritos (GR)) Patrick Asenov (Nat. Cent. for Sci. Res. Demokritos (GR)) Ioannis Kazas (Nat. Cent. for Sci. Res. Demokritos (GR)) Aristoteles Kyriakis (Nat. Cent. for Sci. Res. Demokritos (GR)) Dimitrios Loukas (Nat. Cent. for Sci. Res. Demokritos (GR))

Presentation materials