The Intel® Acceleration Stack for Intel Xeon® CPU with FPGAs is a robust collection of software, firmware, and tools designed and distributed by Intel to make it easier to develop and deploy Intel FPGAs for workload optimization in the data center. The Intel® Acceleration Stack for Intel Xeon® CPU with FPGAs provides multiple benefits to design engineers, such as saving time, enabling code-reuse, and enabling the first common developer interface.
https://www.intel.com/content/www/us/en/programmable/solutions/acceleration-hub/acceleration-stack.html
• Introduction and acceleration stack overview
• Getting Started with the Acceleration Stack
• Developing a SW host application
- LAB 1
• Introduction to Accelerator Functional Unit (AFU)
• Creating an Accelerator Functional Unit (AFU)
• Co-simulation using AFU Simulation Environment (ASE)
• Compiling the Accelerator Function Unit into an Accelerator Function (AF)
• Debugging an Accelerator Function
- LAB 2