A complete redesign of the detector electronics is currently taking place to accommodate the readout and trigger architecture to the future HL-LHC conditions. The Tile PreProcessor (TilePPr) will be the core of the TileCal off-detector electronics after the Phase-II Upgrade. The TilePPr is composed of several FPGA-based boards including Tile Compact Processing Module (TileCPM) to operate and readout the on-detector electronics. As part of the TilePPr module, the Gigabit Ethernet switch (TileGbE) mezzanine board will provide network communication to all the different submodules, and the Tile Computer on Module (TileCoM) mezzanine will be used to remotely configure the on-detector electronics and TilePPr FPGAs as well as, to interface the ATLAS DCS system providing monitoring data. The first version of the deployment of an embedded Linux for the ZYNQ System-on-Chip (SoC) of TileCoM has been built and running. The University of the Witwatersrand is involved in the production of the TilePPr modules including the TileGbE switch and TileCoM.