24–29 May 2020 Postponed
America/Vancouver timezone

Performance of the "IRSX" multi-GSa/s, Switched Capacitor Array Waveform Sampling Frontend ASIC

26 May 2020, 16:00
18m
Parallel session talk Readout: Front-end electronics Readout: Front-end electronics

Speaker

Oskar Hartbrich (University of Hawaii at Manoa)

Description

The "Ice Ray Sampler X" (IRSX) is a low-power 8-channel waveform sampling frontend ASIC designed for HEP applications, fabricated by TSMC in a 250nm CMOS process. Each input channel samples into a switched capacitor array (SCA) of 32,768 samples depth at an adjustable rate of 2-4GSa/s, for an effective sample buffer depth of 8-16$\mu s$. Stored samples can be digitised with 12bit resolution using the integrated Wilkinson ADC, without incurring any dead time on the sampling. The sample storage array is designed for random access for both sampling and digitisation, allowing for flexible acquisition schemes depending on the application.

The IRSX ASIC is currently being used in the 8192 channel front end electronics of the Belle II TOP detector. This talk will present performance figures and characterisation measurements of the IRSX ASIC obtained from test bench campaigns and during the operation in the installed TOP system.

Primary authors

Oskar Hartbrich (University of Hawaii at Manoa) Gary Varner (University of Hawaii) Kurtis Nishimura Martin Bessner (Deutsches Elektronen-Synchrotron (DE)) Luca Macchiarulo (Nalu scientific LLC) Matt Andrew

Presentation materials

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