Conveners
Project Reports I
- Ralf Spiwoks (CERN)
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Tigran Mkrtchyan (Ruprecht Karls Universitaet Heidelberg (DE))6/8/21, 3:15 PM
As part of the ATLAS Level-1 Calorimeter trigger (L1Calo) Phase-I upgrade, the Preprocessor system is being extended with new Tile Rear Extension (TREX) modules.
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For every bunch-crossing, the TREX provides digitized energy data from the Tile hadronic calorimeter to the new L1Calo feature extractor processors via high-speed optical links at 11.2 Gbps.
The TREX is equipped with a Kintex... -
Mpho Gift Doctor Gololo (University of the Witwatersrand (ZA))6/8/21, 3:45 PM
The Tile Calorimeter (TileCal) is part of the ATLAS detector and is the central hadronic calorimeter. The Tile PreProcessor (TilePPr) is the core of the TileCal off-detector electronics for High luminosity LHC. The TilePPr is composed of several FPGA-based boards to operate and readout the on-detector electronics. As part of the TilePPr module, the Gigabit Ethernet switch (TileGbE) mezzanine...
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Emily Ann Smith (University of Chicago (US))6/8/21, 4:15 PM
The Global Feature Extractor (gFEX) is a hardware module that will be installed in the Phase-I Upgrade of the ATLAS experiment to maximise the trigger capabilities and flexibility for selecting events containing large-radius jets, typical of Lorentz-boosted objects. The gFEX makes use of a single module to cover the entire pseudorapidity range of the ATLAS calorimeter. This allows for...
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Paris Moschovakos (CERN)6/8/21, 5:00 PM
SoCs are getting adopted extensively by ATLAS systems for the local control and monitoring of their back-end electronics due to their flexibility towards the hardware through the programmable logic but also the convenience provided for higher level software within the linux platform running on the processing system. OPC UA is the de facto middleware standard for Detector Controls at CERN and...
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Zijun Xu (SLAC National Accelerator Laboratory (US))6/8/21, 5:30 PM
The RCE (Reconfigurable Cluster Element) platform is a general-purpose system-on-chip data acquisition system, varying from a compact standalone bench-top form to ATCA compliant system. It is broadly deployed by several experiments, such as ATLAS, LCLS, LSST, HPS, and ProtoDUNE. We present a new generation bench-top RCE system, including a Xilinx UltraScale+ MPSoC board and a custom FMC...
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Isar Mostafanezhad (Nalu Scientific LLC)6/8/21, 6:00 PM
In this talk, we will cover the development of a variety of SoC type high speed waveform digitizers designed with modularity in mind for large experiments. These microchips digitize, readout and process regions of interest of waveforms at 1-12 GSa/s at power and size constraints desired for particle physics applications. The chips are normally divided into 3 sections: analog input stages,...
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