Speaker
Description
The open, modular, and royalty-free RISC-V Instruction Set Architecture (ISA) is attracting growing interest within the High Performance Computing (HPC) community as a promising alternative to proprietary architectures. Among RISC-V–based solutions, Tenstorrent accelerators, originally developed with Machine Learning and Artificial Intelligence workloads in mind, are also appealing for scientific HPC applications due to their ability to decouple data movement from computation.
To investigate this potential, we developed an N-body code for astrophysical simulations and offloaded its most computationally intensive kernel to Tenstorrent RISC-V–based accelerators using the TT-Metalium programming interface. We evaluated the performance of the resulting implementation in terms of execution time and energy consumption by running a representative simulation on the n300 Wormhole card, and compared the results against both a highly optimized CPU version and a CUDA-accelerated implementation.
Our results show that, compared to the CPU baseline, the TT-Metalium implementation achieves more than a twofold speedup while reducing energy consumption by approximately 50%. In comparison with NVIDIA GPUs, the CUDA implementation currently delivers higher absolute performance. Nevertheless, despite this gap with respect to state-of-the-art accelerators, the Tenstorrent card yields encouraging results for this class of workloads, suggesting that further hardware and software developments may enhance its competitiveness.
Finally, to the best of our knowledge, this work represents the first exploration of strategies for scaling a scientific application across multiple Tenstorrent accelerators, with experiments conducted on configurations of up to four devices, highlighting the feasibility of multi-accelerator deployments for HPC workloads on this emerging platform.