|
12:20
|
--- Break ---
|
|
13:30
|
Microelectronics & FPGA/links UG: 2 rooms
(until 15:20)
|
|
15:20
|
Modules
(until 16:16)
|
|
15:20
|
Ultra-Low Latency Asynchronous Trigger Board for Calorimeter Prototype Tests at SPS
-
Emanuele Romano
(Pavia University and INFN (IT))
|
|
15:40
|
A flexible electronics and DAQ system for the Timepix4 ASIC
- Dr
Nicolo Vladi Biesuz
(Universita e INFN, Ferrara (IT))
|
|
16:00
|
The ePIC dRICH RDO: an FPGA-based card for a photodetection integrated system
-
Sandro Geminiani
(Universita e INFN, Bologna (IT))
|
|
15:20
|
Production
(until 16:16)
|
|
15:20
|
Multi-Gbps Wafer-Level QC for ALICE ITS3 MOSAIX and ePIC SVT LAS
-
Stefano Caregari
(Massachusetts Inst. of Technology (US))
|
|
15:40
|
So you think you are ready for production? Lessons learned from the ATLAS ITk strip tracker module pre-production
-
Luise Poley
(Simon Fraser University (CA))
|
|
16:00
|
Identification and mitigation of two unexpected effects in the ATLAS ITk Pixel Outer Barrel
-
Angelos Zografos
(CERN)
|
|
16:20
|
--- Break ---
|
|
16:50
|
Invited speaker
(until 17:35)
|
|
17:40
|
Poster 2
(until 19:00)
|
|
17:40
|
Mighty-ASIC-Readout-System for the LHCb Upgrade 2 Mighty Tracker
- Dr
Dirk Wiedner
(Technische Universitaet Dortmund (DE))
|
|
18:00
|
Wafer probing for the LHCb Mighty-Pixel Tracker
-
Jonas Malte Ronsch
(Technische Universitaet Dortmund (DE))
|
|
18:20
|
DCDCUTS: A Universal Test System for Qualification of CERN DC–DC Converters
-
Joel Daricou
(CERN)
|
|
18:40
|
A 10 Gb/s serialiser and transmitter for multichannel digitiser in 65 nm CMOS
-
Miroslaw Firlej
(AGH University of Krakow (PL))
|
|
18:40
|
A 12-bit sigma-delta DAC in 28nm CMOS process for global threshold setting in pixel detector chips
-
Oi Ying Wong
(Nikhef National institute for subatomic physics (NL))
|
|
18:40
|
A 20.48-Gbps PAM4 transmitter with 2-tap FFE in 55 nm for high-energy physics experiments
-
Xiongbo Yan
(Institute of High Energy Physics)
|
|
18:40
|
A 25 Gbps VCSEL Driving ASIC Design in a 55nm CMOS technology for Detector Front-end Readout
- Mr
Longkai Li
(Central China Normal University)
|
|
18:40
|
A 5-ps Bin Size TDC Using RO Delay Line with Passive Interpolation
-
Xiaoting Li
(IHEP)
|
|
18:40
|
A Compact Standard-Cell Single-Shot TDC with 8 ps LSB in 16 nm FinFET Technology
-
Alexander Friedrich Elsenhans
(KIT - Karlsruhe Institute of Technology (DE))
|
|
18:40
|
A low jitter 2.56 Gbps reference-less CDR ASIC in 55 nm for HEP applications
- Prof.
Di Guo
(Central China Normal University)
|
|
18:40
|
A Low-Power, High-Precision Self-Calibrated TDC with Multi-Timestamp Reconstruction for the barrel time-of-flight detector Readout in the ePIC experiment
-
Datao Gong
(Fermi National Accelerator Lab. (US))
|
|
18:40
|
A multi-pixel TDC for the CACTUS monolithic timing detector
-
Joaquim Pinol Bel
(IFAE)
|
|
18:40
|
A novel sub-10ps event-driven TDC utilizing pulse-interleaved architecture
- Mr
铮 王
(中国科学院高能物理研究所)
|
|
18:40
|
A Self-Triggered, Event-Driven Readout ASIC for the eXTP PFA X-ray Polarimeter
-
wangna@ihep.ac.cn wangna
|
|
18:40
|
Burn-in and System-Level Validation of Phase-2 CMS Outer Tracker Backend Electronics in a Full ATCA Setup
-
Mark Pesaresi
(Imperial College (GB))
|
|
18:40
|
Characterization of EICROC, the AC-LGAD readout ASIC for the Electron-Ion Collider (EIC)
-
Adrien VERPLANCKE
|
|
18:40
|
Commissioning the CMS Phase-2 Outer Tracker: DAQ, Software, and System Integration toward LS3
-
Matteo Magherini
(CERN)
|
|
18:40
|
CPRE64 - a Low-Noise 64-Channel Readout ASIC for 3D CZT Compton Imaging
- Dr
Ke WANG
(Institute of High Energy Physics,Chinese Academy of Sciences)
|
|
18:40
|
Design and Characterization of a Low-Noise Wide Dynamic Range Analog Channel in 65 nm CMOS Technology for Silicon-Strip Detector Readout
-
Luca Ghislotti
(INFN Pavia & University of Bergamo)
|
|
18:40
|
Design and Test Results of the SIPAC: A Prototype SiPM Readout ASIC for CEPC Calorimeters
- Dr
Huaishen LI
(IHEP)
|
|
18:40
|
Design of a 10.24 Gbps Data Serializer and Wireline Transmitter for the readout of the ALICE ITS3 detector.
-
Vladimir Gromov
(Nikhef National institute for subatomic physics (NL))
|
|
18:40
|
Design of a 25.6 Gb/s Quarter-rate Radiation-Tolerant Serializer in 28 nm CMOS Technology
-
Gabriele Ciarpi
(CERN)
|
|
18:40
|
Development of COFFEE3: A 55 nm HV-MAPS for In-Pixel Readout Architecture Exploration
- Dr
Yang Zhou
(Institute of High Energy Physics, CAS, Beijing, China)
|
|
18:40
|
EMI/EMC characterization of the DAQ system of the micromegas detector of babyIAXO experiment.
-
Alberto Arcusa Puente
(Aragon Institute of Technology Itainnova (ES))
|
|
18:40
|
FATIC4: a prototype front-end ASIC for the uRwell readout of the LHCb Muon detector at upgrade II
-
Giuseppe De Robertis
(Universita e INFN, Bari (IT))
Flavio Loddo
(Universita e INFN, Bari (IT))
|
|
18:40
|
First Integration Test of a Two-Step Powering Scheme with bPOL48V using a CMS 2S Silicon Strip Module
-
Joelle Savelberg
(Rheinisch Westfaelische Tech. Hoch. (DE))
|
|
18:40
|
First Test Results From A Shunt-LDO for the Electron Ion Collider in a 110nm CMOS Process
-
Iain Sedgwick
(Science and Technology Facilities Council STFC (GB))
|
|
18:40
|
FLAXE, a SoC readout ASIC for ECALp calorimeter at LUXE experiment
-
Jakub Moron
(AGH University of Krakow (PL))
|
|
18:40
|
Front End Readout Solutions for time-of-flight systems employing analog SiPMs
-
Sara Portero Castillo
(Universitat de Barcelona)
|
|
18:40
|
Improving linearity and bandwidth of Time-over-Threshold circuits for amplitude measurement
-
Jesus Pena Rodriguez
(Bergische Universität Wuppertal)
|
|
18:40
|
Jia WANG
-
Jia WANG
(Northwestern Polytechnical University)
|
|
18:40
|
Limits of Successive Approximation Register (SAR) ADC Architecture: First Silicon Validation of a 12-bit 65 nm Low-Power ADC for Detector Readout
-
Miquel Ribalda Galvez
(University of Barcelona (ES))
|
|
18:40
|
Modeling Method for Current-Steering DAC Reference Model of Front-End Readout System Using IEEE User-Defined Nettypes
- Mr
Yuanhong Jiao
(Northwestern Polytechnical University)
|
|
18:40
|
Noise and shielding effectiveness measurements on the ATLAS HGTD demonstrator
-
Laurent Royer
(Université Clermont Auvergne (FR))
|
|
18:40
|
Optical Acceptance Testing of Serenity-S1 Boards for the CMS HGCAL Phase-2 Backend Electronics
-
Ahmed Qamesh
(Karlsruher Institut für Technologie (KIT))
|
|
18:40
|
PACIFIC++ readout ASIC for the LHCb Mighty-SciFi
-
Krzysztof Piotr Swientek
(AGH University of Krakow (PL))
|
|
18:40
|
Performance of the ICECAL65 ASIC for energy measurement in the LHCb Calorimeter Upgrade II
- Mr
Alberto López
(ICCUB)
|
|
18:40
|
PHOCA: Cryogenic photon readout ASIC for silicon photomultiplier (SiPM) and photomultiplier tube (PMT) sensors
-
Llorenç Fanals-i-Batllori
|
|
18:40
|
Power Board Design for the ALICE FOCAL-E Pixel Upgrade
-
Bilal Hasan Qureshi
(University of Bergen (NO))
|
|
18:40
|
Production test system for FoCal-E pixel layer qualification
- Mr
Bendik Husa
(University of Bergen (NO))
|
|
18:40
|
Radiation hardness testing and bench characterization of the FastRICH ASIC for future LHCb RICH detectors
-
Vlad-Mihai Placinta
(Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering (IFIN-HH RO))
|
|
18:40
|
RadPix1: A Monolithic Pixel Sensor Demonstrator with Low‑Power Readout and Serial Powering for Future LHCb Upgrades
-
Seddik Benhammadi
(Science and Technology Facilities Council STFC (GB))
|
|
18:40
|
System-Level Validation of the Phase-2 CMS Outer Tracker Using a Multi-Layer Cosmic Telescope
-
Giacomo Fedi
(Imperial College (GB))
|
|
18:40
|
Testing and validation of custom step-down DC/DC converter system for the ATLAS ITk Strip detector
-
Krzysztof Cieśla
(AGH University of Krakow (PL))
|
|
18:40
|
The OBDT Electronics for the CMS Drift Tube Upgrade at the HL-LHC
-
Muhammad Bilal Kiani
(Universita e INFN Torino (IT))
|
|
18:40
|
THRIGLAV: 100 x 100-pixel sub-10ps resolution time-resolved 28nm readout ASIC for 3D-integrated LGAD sensors
-
Bojan Markovic
(SLAC National Accelerator Laboratory (US))
|
|
18:40
|
Timing performances of an asynchronous readout MAPS
-
Willy Perrin
(Centre National de la Recherche Scientifique (FR))
|
|
18:40
|
Validation and Operational Studies of CMS Inner Tracker Pixel Modules under HL-LHC Conditions
- Dr
Samarendra Nayak
(Vilnius University)
|
|
18:40
|
VertexPix: A HV-CMOS Pixel Detector with Fully Synthesized Readout in 130 nm SiGe BiCMOS Technology
-
Bowen Xu
|
|
20:00
|
Gala Dinner
(until 22:00)
|