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TB: BGI DAQ platform
Description
Review of the issue and proposed solutions
BI-TB
Notes and actions in red:
- The current version is V4, and uses a dev kit in the DAQ.
- The V5.1 is under development
- it will use the same dev kit but it will implement the BIPXL v5: Engineering Specification
- it is the version to be used in operation in 2026
- V5.1 is the version to be used for the first milestones agreed: getting the system operational in 2026.
- The operational status minimum-requirements are to be agreed with OP
- a good first use case suggested was to target the LIU reliability run where SPS would like to have an online measurement of the emittance at flat top for HL-LHC type beams — for which a single measurement should be enough
- The operational API will be fixed to the version provided in 2026 with V5.1: going to V5.2 will be a HW change transparent for the users (and SW section?)
- Stephen questioned the split in the operational API between BIPXL Extender and Core. <= Action on Stephen, Juri and Steen to clarify and agree.
- V5.1 will use between the dev kit and commercial PCIe card a protocol developed at SLAC for the development of flexible DAQ systems.
- It was pointed out that EDGE 3 does not support DMA for PCIe, nor EDGE 4 will according to the plans. Having DMA is a requirement for the BGI.
- EDGE 2 had some limited support for specific HW.
- The lack of DMA could have been addressed by a "hosted SoC" work unit for the SoC task force, but as no user was identified in the survey this was not officially added and is a floating option.
- BGI is now a potential user
- Both in V5.1 and V5.2 the architecture is the following:
- The data from the TimePix, either from GBTx or LpGBTx, arrives to an intermediate DAQ
- the devkit in V5.1
- a system based on the ATS SoM in V5.2
- The data from the intermediate DAQ is sent optically to a commercial PCIe card using a protocol and framework developed at SLAC
- The data from the PCIe is extracted based on the drivers for the above mentioned SLAC framework
- The support for this in conjunction with the release of new kernels at CERN, which would not be delayed for incompatibility with a non supported standard, was questioned
- This is identified as the only way to be able to deliver in 2026 an operational BGI based on V5.1 in 2026
- This framework might answer needs not covered for the moment in the sector
- This should be hinted and later presented at the CTTB <= Irene has a presentation the 14th and she will add a slide mentioning this
- David suggested that this could be a solution for the spill monitor and will look into this
- CEM has a solution for 10Gbps but this BW is not enough (or barely) for the BGI, with Hampus quoting up to more than 100Gbps of data depending on how you configure the system
- the actual rate at the actual configuration was not clear
- it was pointed out that this is also a problem addressed by the ObsBox from RF, but this is not standard too (and is not much supported by RF anymore?)
- Beyond the intro of Irene, this solution should be presented to the CTTB in the 2nd half of 2026 <= Hampus and CTTB representatives
- Door not closed for a V5.3 if a standard solution from the sector will appear for LS3
- The data from the TimePix, either from GBTx or LpGBTx, arrives to an intermediate DAQ
- The V5.2 carrier board for the ATS SoM has clear synergies with the LHC BPM consolidation
- post 2026 synergies to be checked for this development
- the architecture proposed looks more in line with the use of CTTx than VTTx <= Mark/Hampus to clarify numbers and requirement: production ongoing
- Devising a reliable timeline to be discussed with OP is now urgent: representative from OP for the commissioning of the BGI are now being appointed, with Tom Levens following for the SPS on the BI side. <= Hampus/Mark/James to prepare a detailed plan do discuss with OP and to be shared with SL mailing list, Tom and Ana no later than the 27th of November
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