Equivalent Oxide Thickness Scaling for short channel high-κ/Metal Gate MOSFET: effects on the performance

by Prof. Lionel trojman (Universidad San Francisco de Quito, Ecuador)

Thursday 7 Jun 2012, 09:00 → 10:00 Europe/Zurich

160/1-009 (CERN)

The CMOS technology, basis of modern microelectronics, has literally changed our style of life for the last four decades. The great advantage of this technology is the scaling. The MOSFET performance is mainly controlled by the inversion charge capacitance and therefore by the dielectric thickness scaling. However, the reduction of the dielectric thickness (SiO2) in the subnanometric range produces dramatic gate leakage issues detrimental for the performance. The introduction of high-κ materials (or high-dielectric permittivity material) enables to keep increasing the inversion charge density without reducing the physical dielectric thickness. By convenience, the physical thickness has been replaced by an electrical thickness or Equivalent Oxide Thickness (EOT). It has been demonstrated that the EOT scaling improves the devices performance through the inversion charge density increase with a reasonable level of gate leakage. Up to day, the EOT reaches the 0.6-0.8nm range. This is possible thanks to specific high-κ materials (HfO2) and specific techniques based on the scavenging effect. In this presentation, we will briefly review the state-of-art for high-κ/Metal gate devices and explain how to obtain high-κ devices. We will also discuss the real advantages of getting ultra thin EOT for short channel devices in terms of performance and optimization. In addition, we will open the discussion to possible advantage in term of radiation hardness for such high-κ devices. This work was partly carried out at the Interuniversity Microelectronics Center (IMEC in Belgium) and the Universidad San Francisco de Quito (USFQ). The USFQ is the only university in Ecuador which counts with modern lab and group of researchers working on the microelectronics. Our field of expertise goes from the semiconductor device to the system level and design of analog/digital electronics systems but includes also the theoretical description of electronic properties of materials by means of DFT methods. As the LHC is planning to increase the luminosity substantially for 2017, major upgrades in the electronics of the different detectors are needed. USFQ has the potential to contribute and is currently exploring the possibility to work jointly with the CMS collaboration and with our CERN colleagues.