Speaker
Mr
Thomas Conneely
(University of Leicester)
Description
The requirements of high energy, high luminosity particle accelerators, particularly the Large Hadron Collider at CERN, has driven the development of a range of Application Specific Integrated Circuits (ASICs) able to cope with extremely high event rates and data throughput, while maintaining picosecond timing resolution in the region of 10-100 ps incorporated in a high channel density design. The University of Leicester and Photek Ltd. have been collaborating on using two of these CERN developed ASICs, the NINO amplifier/discriminator and High Performance Time to Digital Convertor (HPTDC), for readout of multi-channel and imaging MCP detectors, taking advantage of the ~25 ps resolution of these ASICS combined.
These ASICs are being used for the development of three different microchannel plate (MCP) based imaging detectors. The HiContent and IR-PICS tubes are multiple-anode detectors, with 8x8 pixels^2 and 32x32 pixels^2 respectively, with integrated readout electronics based on the HPTDC and NINO combination. The Capacitive Division Image Readout (C-DIR) detector adopts a charge sharing technique to achieve a moderate position resolution of the order of 100x100 pixels^2 with a time resolution of ~25 ps, and a maximum rate of 10MHz limited by MCP count rate saturation. Measurements of the detector's performance will be presented, with a discussion of our experience utilising ASICs designed for high energy physics for alternative applications.
Authors
Dr
Jon Lapington
(University of Leicester)
Mr
Thomas Conneely
(University of Leicester)
Co-author
Dr
James Milnes
(Photek LTD)
