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12–16 Dec 2022
IISER Mohali
Asia/Kolkata timezone

Test Suite development for ELM2 board for L1 Trigger upgrade

15 Dec 2022, 14:00
1h
IISER Mohali

IISER Mohali

Lecture Hall Complex, IISER Mohali, Sector 81, Knowledge city, SAS Nagar, Punjab, India
Poster Poster - 3

Speaker

Mandakini Ravindra Patil (Tata Inst. of Fundamental Research (IN))

Description

Introduction:
For Phase-2 of the operation of the LHC, starting in 2029, CMS will undergo major upgrades to its detectors and readout electronics. A completely new first-level trigger system will ensure that the
excellent physics performance of CMS is maintained or improved under the challenging pile-up conditions in Phase-2. The new trigger system, based on generic ATCA processing boards hosting XilinxUltrascale Plus FPGAs and interconnected with links at 25 Gb/s, will exploit high granularity information from the calorimeters, muon systems and a track finder, reconstructing tracks from the silicon strip tracker at the bunch crossing rate. The trigger system will contain algorithms such as particle flow that previously only have been employed in software at the higher trigger levels. The final stage in the level-1 trigger, the Global Trigger (GT), will receive high-precision trigger objects from the muon-, calorimeter-,
track- and particle flow triggers

ELM Test Suite development

The generic ATCA based main Trigger board –APx (Advanced Processor board) has several daughter boards installed as mezzanine boards and one of them is ELM2 (Embedded Linux Mezzanine ver 2.) The main purpose of ELM is to serve as an on-board control interface for ATCA modules. Our group TIFR
took the responsibility to fabricate, QA, and design test firmware. The Test firmware developed at TIFR targets Embedded Linux Mezzanine rev2 or ELM2/ This device is based on a ZYNQ System-on-Chip (SoC) device from Xilinx. Eventually,it is required to have several hundreds of these modules. In order to provide a suitable quality control for such production volume, it was vital to have an automated test
stand that requires minimal operator interference. 

In collaboration with Department of Physics(DOP), University of Florida, USA, we developed an automated test Suite that includes provisions for testing all the implemented external interfaces. The developed test suite developed in 2 frameworks:-1 Bare-metal/standalone- Application running directly on HW, no OS layer is present. 2.Using Customized Linux- Built in customized manner, which includes Petalinux Kernel and Centos 7 Rootfs. The test framework includes automated tests of DDR connected to ZYNQ in standalone/bare-metal manner. However, the Linux based test framework includes multiple automated tests for Gigabit ethernet modules, Configuration and tests for clock synthesizers, and frequency measurements. Data integrity tests for EEPROM devices. The test suite is validated on the test setups in DOP,Florida.I will be talking about the details of the application developed and discuss the methodlogy to test
different interfaces of the ELM2 board in this talk

Session Future Experiments and Detector Development

Primary author

Mandakini Ravindra Patil (Tata Inst. of Fundamental Research (IN))

Presentation materials

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