30 June 2024 to 4 July 2024
FMDUL
Europe/Lisbon timezone

Design and Validation of the DAQ hardware for MAPS based telescope readout

3 Jul 2024, 14:09
1m
Main Auditorium (FMDUL)

Main Auditorium

FMDUL

Main Auditorium of the Faculty of Dental Medicine at the University of Lisbon (Faculdade de Medicina Dentária da Universidade de Lisboa)

Speaker

Weigang Yin (IHEP, CAS)

Description

MIC series MAPS ASIC are being designed at CCNU for a few physics experiments. A flexible chip readout and DAQ system is under the development, to support the chip evaluation and the readout of telescope with multiple modules. The system includes a front-end kit CARO and a back-end PCIe based system PiDAQ. CARO is based on the AMD Kria K26 SOM, while PiDAQ is based on the AMD Versal Prime series FPGA VM1402. The main features of PiDAQ board contains: PCIe Gen4×8 bus support throughput up to 14.76 GB/s; two DDR4 on-board memory to support data buffering with the bandwidth faster than 37.7 GB/s; two QSFP28 cages to support up to 8 bidirectional links, with a throughput up to 25 GB/s. PiDAQ is able to interface up to eight CARO modules in future telescope. This poster introduces the design details and preliminary validation of the PiDAQ hardware, firmware, and software.

Primary author

Qiming Liang (Central China Normal University)

Co-authors

Kai Chen (Central China Normal University) Le Xiao (Central China Normal University CCNU (CN)) Weigang Yin (IHEP, CAS) lei lang (Central China Normal Unversity)

Presentation materials

There are no materials yet.