Speaker
Yoshinobu Unno
(High Energy Accelerator Research Organization (JP))
Description
We have been developing silicon planar pixel sensors for very high radiation environments, based on n$^{+}$ pixels in p silicon-bulk, the n$^{+}$-in-p technology.
Recent development of the n$^{+}$-in-p silicon strip sensor has shown potentiality being radiation tolerant and low cost in fabrication.
An application of the n$^{+}$-in-p technology to the pixel sensor in the inner-most tracking detector at the high luminosity upgrade of the large hadron collider (HL-LHC) is a challenge for the technology, where the particle fluence becomes as high as 1-3$\times$10$^{16}$ 1-MeV neutron equivalent (n$_{eq}$)/cm$^{2}$.
The issues in the development are:
(1) the high voltage operation up to 1000 V to achieve a reasonable charge collection in heavily radiation-damaged silicon sensors;
(2) the biasing structure with the least inefficient area, that are required for testing the sensors before bump-bonding the readout ASIC's;
(3) the isolation of the n$^{+}$pixels;
(4) the least dead area in the edge of the sensors;
(5) the thin sensors;
and (6) the bump-bonding of the pixel sensors and the readout ASIC's.
In finding the best solutions, we have fabricated pixel sensors and test diodes with punch-thru (PT) and Polysilicon biasing structures, p-spray and p-stop isolation structures, varied edge spaces, varied number of guard rings, and thinning the fabricated wafers.
A number of issues in the bump-bonding with lead-free (SnAg) solders have been revealed and solved.
The sensors and diodes are irradiated up to 1$\times$10$^{16}$ n$_{eq}$/cm$^{2}$.
The non-irradiated and irradiated pixel sensor flip-chip modules were put in testbeams.
The design features of the pixel sensors and the test structures are reviewed and the effects of the radiation damage in the pixel sensors and to the features are summarized.
Author
Yoshinobu Unno
(High Energy Accelerator Research Organization (JP))
