Speaker
Dr
Yosuke Takubo
(High Energy Accelerator Research Organization (JP))
Description
The inner tracker of the ATLAS detector will be replaced at the future upgrade to keep the performance at high luminosity operation. We have been developing super-module concept for the upgrade, based on double-sided silicon strip modules. In the super-module concept, one super-module consists of 12 double-sided modules and one double-sided module has 80 readout ASICs which read 128 strips per one ASIC. Then, we have 122,880 readout strips for one super-module. Since the number of the readout strips becomes large to keep hit occupancy at an acceptable level, the data readout is one of the key issues. We developed readout system by using a “Seabas” DAQ boards. Seabas processes the data from the super modules with an FPGA (User-FPGA) and transfers data to a computer via Ether-net with SiTCP protocol. SiTCP is a technology to realize direct access and transfer of the data in the memory of User-FPGA from the PC by utilizing TCP/IP and UDP communication with a dedicated FPGA. We developed firmware and software for Seabas, together with readout hardware chain, and established basic functionality for reading out the super-module.
Author
Dr
Yosuke Takubo
(High Energy Accelerator Research Organization (JP))
