On-chip power conversion in the FE-I4 pixel chip

6 Dec 2011, 16:10
20m
Activity Center (Academia Sinica)

Activity Center

Academia Sinica

128 Academia Road, Section 2, Nankang, Taipei 115, Taiwan
ORAL Electronics Electronics

Speaker

Dr Yunpeng Lu (Institute of High Energy Physics , Beijing, China)

Description

FE-I4 is a 130nm feature size CMOS readout IC designed for the next-generation of hybrid pixel detectors. The first version FE-I4A contains multiple powering options in order to evaluate the performance for future applications. The first optimization is being done for the ATLAS Insertable B-Layer (IBL) upgrade. FE-I4A contains two stand-alone linear-shunt voltage regulators(ShuLDO) and a divide-by-two charge pump DC-DC converter. The design and test results of these on-chip power converters will be presented in this report.

Author

Dr Yunpeng Lu (Institute of High Energy Physics , Beijing, China)

Presentation materials