Speaker
Christopher Edward Brown
(CERN)
Description
Quickly understanding the resource usage of a model is a common workflow for anyone designing an FPGA targeted model. Often the developer won't have access to vivado or a PC capable of running it. A website where the user can upload a trained model, hls4ml can run on the model, produce firmware estimates and a package of the associated firmware could solve this issue. A web interface GUI could allow the user to change simple parameters of the firmware build; bitwidth, FPGA targeted, clock speed etc. and developers could easily determine if a given model is feasible in FW and have some prototype FW to experiment with. This would be a useful tool for the community allowing novices to experiment with the process of designing fastML models.
Author
Christopher Edward Brown
(CERN)