Machine Learning at HL-LHC - Deep Learning with FPGA

by Maurizio Pierini (CERN)

Monday 4 Nov 2024, 11:00 → 12:00 Europe/Zurich

BSP 626 / Zoom

Bringing Machine Learning solutions as close as possible to the LHC detectors is crucial for an efficient data collection during the High-Luminosity LHC era, one of the most complex big-data challenges in the world. Over the past few years, an active R&D program at CERN, in collaboration with affiliated institutes, has been working to make this vision a reality. This involves developing all-in-one, on-chip solutions to deploy neural networks and boosted decision trees directly in the hardware triggers of LHC experiments, using FPGA cards for network execution as a digital circuit emulation. Starting with simple decision trees and multi-layer perceptrons in 2018, the project has delivered a general-purpose software (hls4ml) that enables the execution of complex deep learning architectures—such as convolutional and graph neural networks—on FPGAs within O(10) nsec, thanks to the use of aggressive compression techniques to optimise performance in this time-sensitive environment at the cost of a minimal accuracy loss.

In this seminar, we will review the key milestones of this project, from its early development to its most recent achievement: the deployment of an anomaly detection algorithm for signal-agnostic new physics searches, which has been actively collecting data as part of the CMS L1 trigger since early 2023.

EPFL_Nov2024.pdf