Speakers:
Erno David(HUN-REN Wigner Research Centre for Physics (HU)), Filippo Costa(CERN), Julien Si-Ming Bounmy(Centre National de la Recherche Scientifique (FR)), Olivier Bourrion(Centre National de la Recherche Scientifique (FR))
2
Firmware updates on dev
Mockup
Julien updated lpgbt-emulator to full VHDL
VHDL validated in simulation and on harwdare
currently adding vunit to this piece of work
next step, include this in CRU simulation as a counterpart instead of verilog ASIC model
CRU
Modified project to compile either run3 (syn-cru) or run4 (syn-cru-lpgbt)
First compiliation with top_cru_lpgbt.vhd and core_lpgbt.vhd
FLP@LPSC updated to ALMA8
First test (firmware loading, roc-list-card, si5345 PLL configuration)
standaolen-stratup-lpgbt.py in modification, adding features for lpGBT in GBT.py