Speaker
Description
The HVCMOS technology is promising technology for tracking detectors at future experiments such as LHCb upgrade and Higgs factories, for its radiation hardness, fast charge collection and hence good spatial and timing resolution. Development of HVCMOS in smaller feature size will allow more functionailities in the same pixel area, and a reduced power consumption. We proposed a project to develop HVCMOS sensor prototypes using 55nm CMOS process based on initial validation of the process. This talk will report the latest submission of COFFEE3 chip, a small prototype with two different array readout aiming at full validation of the process. One of the pixel array readout architecture implements novel design for optimal timing precision fully exploiting the small feature size, while the other adopts a more conservative strategy less sensitive to current process limitation. The updated timeline of the project proposal will also be briefly covered.
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (I. scientific results or II. project proposal) | III. other (please specify) |
