Speaker
Description
The All-Silicon project focuses on the development of monolithic CMOS pixel modules. Unlike traditional pixel detector modules, which involve individually diced chips from the wafer that are subsequently glued onto a support structure, the all-silicon approach integrates several CMOS chips into a single, uniform ladder, cut from a single silicon wafer. Each ladder is diced in one large self-
supporting piece, allowing for direct assembly in the detector. The all-silicon solution offers a more compact, lower-power, and cost-effective option for future high-luminosity particle physics experiments.
To reduce material even further, a Redistribution Layer (RDL) is being developed to provide efficient power distribution for the module, eliminating the need for hybrid PCBs. In addition, thermal and mechanical simulations are employed to optimize the performance of the CMOS chips as well as the RDL, defining optimal air-cooling conditions to ensure effective heat dissipation to prevent overheating due to heat produced in the CMOS chips and in the RDL components.
The presentation will outline the all-silicon ladder concept, preliminary tests with a RDL on a resistive heater and first results of thermo-mechanical simulations.
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (I. scientific results or II. project proposal) | I. Presentation on scientific results |
