3rd DRD3 week on Solid State Detectors R&D

1 ns to 100 ps timing precision architecture (PMaTT) in TPSCo 65nm with Update on NAPA and TDC @ SLAC

2 Jun 2025, 16:30

20m

Nikhef, Amsterdam

WG/WP1 - CMOS technologies

Speakers

Caterina Vernieri (SLAC National Accelerator Laboratory (US)) Didier Claude Contardo (Centre National de la Recherche Scientifique (FR))

Presentation materials

Tracking&Timing_Architecture_01062025.pdf

Tracking&Timing_Architecture_01062025.pptx