Edge SpAIce CERN Technical Meeting

Tuesday 25 Feb 2025, 10:00 → 11:00 Europe/Zurich

42/R-016 (CERN)

10:00 → 11:00 Updates

Speakers: Nicolo Ghielmetti (CERN), Noemi D'Abbondanza (Sapienza Universita e INFN, Roma I (IT)), Sioni Paris Summers (CERN), Stylianos Tzelepis (National Technical Univ. of Athens (GR))

Agenda

• RAW paper (Noemi)
• CI pipeline (Nicolò)
• KT Fund (Rita)

Minutes

• Paper should be submitted Thursday
  • Detailed feedback to follow
• Structure looks good
• Need to figure out authors
  • Add everyone we think should be on (incl. NTUA and Endurosat)
  • Noemi’s name first
• SEFUW abstract was accepted
  • Nicolò to go
  • Lots of networking potential: AMD, NanoXPlore, Siemens (Catapult)
  • 34701
  • Rita will investigate whether to go as well
• CI pipeline (more notes below)
  • Have brought Stelios’ contributions (e.g. Vitis Accelerator)
  • Working with CI4FPGA to polish environment
• KT Fund
  • “Through a competitive process, it selects innovative projects based on a CERN technology with high potential for impact in another field than high-energy physics, with potential for positive impact on society.”
  • Medical fund has pre-pitch in mid March
  • KT fund has proposal deadline end of March
  • “Bring the LHC trigger to the satellite”

 

Nicolo's contribution

• Gitlab Pipeline (show with screensharing):
  
  • Stelios pushed VitisAccelerator & FIFO depth opt. in hls4ml@dge-spaice branch
    • Added one stage for FIFO depth optimisation execution in parallel with QONNX vs hls4ml numerical validation (generate_model_... & generate_fifo_opt_model_...
    • FIFO depth opt. crashes if executed by gitlab-runner in Docker container on corellia
      • Weird compilation errors, probably due to versioning of g++ or env variables
    •    Working on porting all stages that uses hls4ml and vitis_hls on CERN CI4FPGA runners and image
      • They are currently working on adding miniforge to their image

• SEFUW'25 Abstract ACCEPTED

  • Registered to the workshop
  • Abstract:
    The increasing demand for onboard data processing in space

    applications has led to the integration of Artificial Intelligence
(AI) and Machine Learning (ML) on Field-Programmable Gate Arrays
(FPGAs). This is particularly relevant for missions requiring
optimized data transmission, such as Earth observation
applications. AI-driven techniques can enhance onboard autonomy by
performing tasks such as event detection, data filtering, and
compression, ultimately reducing downlink bandwidth requirements.
The Edge SpAIce project demonstrates the potential of FPGA-based AI
processing for space applications, focusing on plastic litter
detection in oceans using Deep Neural Networks. Since real-time
inference is not required, our approach prioritizes computational
efficiency, using pixel/second/watt as the primary performance
metric. By balancing latency, throughput, and power consumption, we
optimize FPGA utilization for space-based deployments. Leveraging
open-source tools such as hls4ml and QONNX, we implement drastic
model compression and efficient hardware deployment,
enabling high-performance, low-power computation suitable for
resource-constrained space environments.