27–29 Apr 2026
Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering (IFIN-HH)
Europe/Bucharest timezone

Intrinsic coincidence time resolution of candidate data acquisition systems for the HISTARS project

29 Apr 2026, 09:20
20m
Training and Conference Center (CCI) ( Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering (IFIN-HH))

Training and Conference Center (CCI)

Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering (IFIN-HH)

No. 30, Reactorului Street, Magurele, Ilfov, ROMANIA (077125)
Oral presentation Fast front-end and readout electronics Day 3

Speaker

Victor Martinez Nouvilas (Universidad Complutense (ES))

Description

The HIE-ISOLDE Timing Array for Reaction Studies (HISTARS) array is being developed for the measurement of lifetimes of excited nuclear states produced in reactions at HIE-ISOLDE (CERN). It is based on fast particle and gamma scintillator detectors that will require a fast data acquisition system capable of handling more than 60 channels with good time and energy resolution. Digitizing the fast scintillator signals will allow for a flexible signal processing, while preserving the pulse time structure, and potentially enabling high-precision timing.
In this work we measure the intrinsic time resolution of several digitizer systems for data acquisition and processing of data stemming from fast scintillators, such as LaBr₃(Ce). A very promising high-performance candidate is the CAEN 2751 digitizer, providing 14-bit, 1 GS/s, 16 channels, a 500 MHz bandwidth, and embedded FPGA/ARM processing for advanced waveform acquisition and digital pulse processing via USB or Ethernet.
The DRS4 Evaluation Board uses the DRS4 switched-capacitor array chip developed at Paul Scherrer Institute with 4 input channels, sampling rates of 0.7 to 5 GS/s with 1024 sampling cells (roughly 200 ns acquisition window at 5 GS/s), and an analog bandwidth of 700 MHz at 12-bit resolution. The board has a FPGA-based readout control with USB data transfer. The CAEN DT5742B is a 16-channel switched-capacitor digitizer based on the same DRS4 chip, thus providing 12-bit resolution and up to 5 GS/s sampling rate. It includes a fast trigger channel for timing, multiple trigger modes, event buffers, and USB or optical-link readout.
The CAEN DT5751 is a desktop waveform digitizer with 2 or 4 channels, 10-bit resolution, and sampling rate of 2 GS/s (interleaved) or 1 GS/s per channel. It has 500 MHz analog bandwidth and 1 Vpp input range with programmable DC offset.
An in-house custom microcontroller-based data acquisition system, still in development, capable of analog pulse integration and timestamp assignment based on a bespoke time to amplitude converter (TAC), will also be included in the comparison. This comparison will guide the choice of the data acquisition system for the HISTARS project and determine its baseline contribution to the timing capabilities of the array.

Authors

Co-authors

Andrés Illana Sisón (Consejo Superior de Investigaciones Cientificas (CSIC) (ES)) Jose Antonio Briz Monago (Universidad Complutense (ES)) Jose Manuel Udias Moinelo Mr José Ángel Jiménez (Anneo Technologies) Mr Luis Miguel Gutiérrez (Anneo Technologies) Miriam Caballero Rodriguez (Universidad Complutense (ES)) Nikita Bernier (Universidad Complutense (ES))

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