Estimating the lifetime of the RD53 Pixel ASIC at the HL-LHC
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Radiation tolerance was one of the central design challenges for the RD53 pixel readout ASICs developed for the Phase-II upgrades of the ATLAS and CMS pixel detectors. These chips are required to remain functional after exposure to total ionizing doses of up to 1 Grad throughout operation at the High-Luminosity LHC.
This seminar will cover the radiation qualification campaign performed on the main components of the RD53 ASIC, including the Shunt-LDO powering circuit, the analog front-end and the digital logic. It will then focus on detailed studies of ring oscillator circuits embedded in the ASIC, which are used to measure radiation-induced degradation of the digital logic. Measurements from X-ray irradiations at different dose rates are combined with a long-term, low-dose-rate irradiation using a Kr-85 source to characterize the dose-rate dependence of the gate delay and assess the effects of high doses delivered over many years. These results are used to predict the evolution of the digital logic under realistic operating conditions and estimate the expected lifetime of the ASIC in the upgraded ATLAS Inner Tracker.