EP-ESE Electronics Seminars

Energy Limits in Current A/D Converter Architectures

Name: Energy Limits in Current A/D Converter Architectures
Start: 2012-05-25T09:00:00+02:00
End: 2012-05-25T10:30:00+02:00
Location: CERN

by Prof. boris Murmann (Standford university)

Friday 25 May 2012, 09:00 → 10:30 Europe/Zurich

40/S2-D01 - Salle Dirac (CERN)

40/S2-D01 - Salle Dirac

CERN

115

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Description

Driven by ever-increasing application demands, the energy expended per A/D conversion has been reduced substantially over the last decade. This talk will survey the most recent trends and will investigate energy limits as they apply to A/D converter architectures commonly employed in fine-line CMOS technology (Flash, Pipeline, SAR and Oversampling Converters). Through this analysis, opportunities for further improvements will be identified and discussed in detail.

Organised by

Alessandro Marchioro

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Energy Limits in Current A/D Converter Architectures

by Prof. boris Murmann (Standford university)

40/S2-D01 - Salle Dirac

CERN