Time to Digital Converters and results from a new 5ps TDC prototype ASIC

by Lukas Perktold (Graz University of Technology (AT))

Tuesday 26 Mar 2013, 09:00 → 10:00 Europe/Zurich

13/2-005 (CERN)

Novel sensor designs achieve time resolutions in the sub 10 ps-rms domain. To extract the full potential of such new sensors, fine-time resolution measurements in the ps regime have become necessary. This seminar presents common techniques to achieve fine time resolutions and discusses challenges in the design of fine resolution time-to-digital (TDC) converters. In the ps precision domain, device mismatches and robustness against power supply noise play a crucial important role. Measurement results of a demonstrator ASIC with a small number of channels designed in a 130 nm technology will be presented. Timing precisions better than 3 ps-rms have been demonstrated in the lab. The TDC architecture has been designed to target the needs of future high-energy-physics experiments and provide the possibility to be scaled to a larger system.

Slides 20130526_perktold_ESE-TDC-seminar.pdf