Recent Progress of the SOI Pixel Detector

1 Sept 2014, 17:20
25m
Niagara Falls, Canada

Niagara Falls, Canada

Sheraton on the Falls

Speaker

Miho Yamada (High Energy Accelerator Research Organization (JP))

Description

We are developing monolithic pixel detectors based on 0.2 um fully-depleted Silicon-on-Insulator technology fabricated Lapis Semiconductor Co Ltd. for high energy physics experiments, X-ray applications and so on. To employ SOI devices on such radiation environments, we have to solve effects of total ionization damage for the transistors which are enclosed in the oxide layers. The holes which are generated and trapped in the oxide layers after irradiation affect characteristics of near-by transistors due to its electric field. We have been developing double SOI sensors that have independent electrode in middle of buried oxide layer to adjust the potential for compensation of radiation effect. Performances of double SOI devices are presented. In addition, a new sensor processing scheme "PIXOR (PIXelOR)" which reduces the number of readout channels and avoid degradation of position resolution due to large circuit area has been developing. It is a metric of “superpixel" which consists of 4, 8 or 16 strips in X and Y direction. This feature performs high resolution, low occupancy and signal processing of on-sensor at the same time. Recent progress of other SOI device is also shown in this presentation.

Author

Miho Yamada (High Energy Accelerator Research Organization (JP))

Presentation materials