Speaker
Mathieu Benoit
(CERN LCD)
Description
A vertex-detector concept based on the hybrid planar pixel-detector technology is currently under development for the proposed Compact Linear Collider (CLIC). The low material budget of only 0.2% X0 per layer corresponds to an equivalent thickness of 200 um of silicon and includes the infrastructure for powering and mechanical support. To reach this material budget, sensors and readout ASICs will each have to be thinned down to approximately 50 um. In a first phase of R&D, assemblies were produced using thin planar pixel sensors (50-300 um) hybridised to Timepix readout ASICs. Both standard thickness ASICs and ASICs thinned to 100 um are used. Sensors include active-edge sensors from Advacam with 50 um thickness and Micron semiconductor sensors with 100 um thickness hybridised by IZM. The assemblies have been calibrated with sources and X-ray fluorescence measurements and characterised in beam telescope tests at DESY with a 5.5 GeV electron beam. In this talk we present the current status of sensor calibration, test-beam analysis and comparison with GEANT4 simulation using a sensor and electronics digitization model. We also show first measurement results for the recently produced CCPDV3 active HV-CMOS sensors matching the 25 um pitch of the 65 nm CLICpix readout ASIC prototypes.
Primary author
Mathieu Benoit
(CERN LCD)
