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EP-ESE Electronics Seminars
Radiation-tolerant SAR ADC architecture and digital calibration techniques
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Europe/Zurich
13/2-005 (CERN)
Description
Abstract: The trend of converging to the successive-approximation-register (SAR) architecture in modern low-power, high-performance A/D converter design is analyzed. Redundant conversion techniques such as sub-binary DAC and split-ADC, which are enabling components for advanced digital calibration of SAR, will be shown equally pivotal for incorporating radiation tolerance into CMOS data converters suitable for high-energy physics experiments. I will walk you through a current 65-nm SAR design for LAr calorimeter readout that is targeted to operate at 80 MS/s with a 14-bit resolution.
Dr. Yun Chiu is currently the Erik Jonsson Distinguished Professor of the Department of Electrical Engineering of the University of Texas at Dallas, where he is the director of the Analog and Mixed-Signal Lab at the Texas Analog Center of Excellence. He received his Ph.D. degree in EECS from the University of California at Berkeley.
Dr. Chiu is instrumental in advancing the adaptive signal-processing techniques for precision data converters, mixed-signal, and RF circuits. He was the first to advocate the concept of “digital equalization” for analog circuits and demonstrated silicon prototypes in SAR ADCs, time-interleaved ADC arrays, and RF power amplifier.
Dr. Chiu co-received the Jack Kilby Outstanding Paper Award from the 2004 International Solid-State Circuits Conference (ISSCC), the 46th ISSCC/DAC Student Design Contest Award in 2009, and the Best Regular Paper Award from the 2012 Custom Integrated Circuits Conference (CICC). He has 80 journal and conference publications and is the author of four books and book chapters related to data conversion. He is an IEEE senior member.
