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Technical Training Seminar
Low-Voltage Differential Signaling (LVDS): Technology and Applications
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Europe/Zurich
40-SS-C01 (CERN)
40-SS-C01
CERN
Description
National Semiconductor pioneered the Low-Voltage Differential Signaling (LVDS) technology, and is a recognized leader in high speed differential products and design tools. National Semiconductor offers a wide range of innovative, affordable interconnect solutions including serializer-deserializers (SerDes), drivers-receivers-transceivers, crosspoint switches and clock drivers.
LVDS is a new technology addressing the needs of today's high performance data transmission applications, and the LVDS standard is becoming the most popular differential data transmission standard in the industry. This Technical Training Seminar will present National Semiconductor existing and future products, and some applications relevant to the activities carried out at CERN.
14:00 - 14:15 Presentation of National Semiconductors. Overview of analog products
14:15 - 14:45 Existing and future products: Low Voltage Differential Signaling (LVDS), Serial Digital Video (SDV), Ethernet
14:45 - 15:15 Driving transmission lines: from Bus LVDS multi-point backplane to 100-meter cable point-to-point applications
15:15 - 15:30 coffee
15:30 - 16:00 Improving Field Programmable Gate Array (FPGA) performance and lowering total cost
Organiser(s): Davide Vitè / HR-PMD-ATT
More information: http://www.cern.ch/TechnicalTraining/special/TTseminars.asp
LVDS is a new technology addressing the needs of today's high performance data transmission applications, and the LVDS standard is becoming the most popular differential data transmission standard in the industry. This Technical Training Seminar will present National Semiconductor existing and future products, and some applications relevant to the activities carried out at CERN.
14:00 - 14:15 Presentation of National Semiconductors. Overview of analog products
14:15 - 14:45 Existing and future products: Low Voltage Differential Signaling (LVDS), Serial Digital Video (SDV), Ethernet
14:45 - 15:15 Driving transmission lines: from Bus LVDS multi-point backplane to 100-meter cable point-to-point applications
15:15 - 15:30 coffee
15:30 - 16:00 Improving Field Programmable Gate Array (FPGA) performance and lowering total cost
- LVDS SerDes: Using a lower cost FPGA
- Using discrete LVDS and Current Mode Logic (CML) devices to enhance signal integrity
- Improving the electrostatic discharge (ESD) protection for interface applications
16:00 - 16:25 Ethernet: Selected applications. Product specifications and design recommendations. Embedded - industrial applications
- questions, discussion
Organiser(s): Davide Vitè / HR-PMD-ATT
More information: http://www.cern.ch/TechnicalTraining/special/TTseminars.asp
