Introduction

• Ken Wyllie

Room: 503/1-001 - Council Chamber

The GBT project

• Paulo Moreira, CERN

Room: 503/1-001 - Council Chamber

GBT implementation in a Xilinx FPGA

• Csaba Soos

Room: 503/1-001 - Council Chamber

GBT implementation in an ALTERA FPGA

• Frederic Marin, CPPM

Room: 503/1-001 - Council Chamber

High Speed Link R&D at CPPM

• Jean-Pierre Cachemiche, CPPM

Room: 503/1-001 - Council Chamber

Review of short-distance high speed copper links

• Jan Buytaert, CERN

Room: 503/1-001 - Council Chamber

Super-TFC ideas

• Federico Alessio/Richard Jacobsson

Room: 503/1-001 - Council Chamber