Developer's meeting

Wednesday 9 Nov 2016, 16:00 → 18:00 Europe/Zurich

Block-diagrams.pdf

Notes:
- brief discussion of the review, especially the recommendations by the review committee (in particular the items by Jos)
- brief discussion of PNNL activities & plans
  * Eric has code building artDAQ fragments from data DMA'd from the HTG710 board and writing these in art/ROOT format
  * Lynn is studying adding compression to the Wupper engine
  * Kevin is studying the input data links, aiming to find space for the compression in the firmware. He is presently using GBT mode as a starting point; we touched on the fact that the baseline for ProtoDUNE will actually be full mode
- brief discussion of Nikhef activities & plans
  * Frank circulated a block diagram accommodating the software approach
    o  brief discussion of "pull" versus "push": according to Eric the "pull" scheme is a very recent baseline and may not be fully implemented yet?
  * Milo described his work setting up for studies of compression algorithms offline (for now, mainly attempting to reproduce WIB data format from information stored in ROOT files)
- more discussion on details:
  * PNNL does not yet have FELIX VHDL code (beyond Wupper) available; this could hurt the development effort. OK to develop without real support from the FELIX support team
  * WIB status? Not sure at this point. Mark mentioned that Full mode is not yet working fully, and is also not supported by the FELIX software backend; presumably this makes it premature to send a firmware block to Eric Hazen at this point. Lynn explained that most of the difficulties porting from Xilinx to Altera are typically related to Intellectual Property protected code.
  * artDAQ: a threaded version of the artDAQ demo is available. Eric mentioned that he is not presently using a threaded version (but that microBooNE uses it). Tentative agreement that in the software context as discussed from the Nikhef side, threading is likely needed.
  * agreement that a common code repository will be useful to have (Paul added that this was actually also one of the review recommendations)
- proposal: meet bi-weekly for now (i.e., next meeting on November 23). Could change to 08:00 (PNNL) / 17:00 (CERN/Nikhef), i.e., one hour later, if this works for Giovanna

Action items:
- Frank to ask Andrea once more about making the FELIX VHDL code (beyond the Wupper code) available
- Frank to ask Andrea / BNL for Full mode firmware block status (in view of need to port to Altera for use in WIB)
- Kevin to create git repository (free github version, not worrying about this being open) [done, but ongoing discussion about whether it's preferable to use gitlab instead]
- Frank to ping CERN secretary once more about Indico [now done after Giovanna's intervention]
- Frank to send information to Eric James on FELIX person-power from Nikhef (CERN, PNNL can follow up)
  * PNNL is unlikely to be able to send Kevin to CERN (he will be stationed at FNAL soon)
  * Nikhef will station Milo at CERN for a year starting from ~October 2017
  * (added after the meeting: a CERN post-doc will start in January/February 2017, for a period of two years and with a large fraction on FELIX)