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v3.3.3-pre
The CMS Phase-2 Outer Tracker Upgrade planned for the HL-LHC contains strip-strip (2S) and pixel-strip (PS) silicon modules. Each of them includes two high-density interconnect front-end hybrid circuits, equipped with flip-chip ASICs, passives, connectors and mechanical structures. Although the necessary ASICs were not all available, several hybrid prototypes have been produced for the 2S and PS modules, enabling the qualification of the front-end stage and of the hybrid topologies. This development phase also faced numerous technical difficulties, some of them are already solved and some are being explored now: CTE mismatches between various materials, compatibility of adhesives with lead-free reflow profiles, compatibility of adhesives with carbon fibre materials, etc. These problems can cause the bow of the hybrid, its delamination, or poor bump bond joints. The operational lifetime of these hybrids is evaluated with specific test coupons that were exposed to accelerated thermal stress cycles, aiming to test the reliability of the solder joints, vias and traces. Results from different suppliers and technologies will be reported and compared. Plans for the production quality check and functional testing will be presented. Altogether, the actual advancement of the development and the actions applied to improve as much as possible the lifetime and reliability of the hybrids will be presented.