There is a dearth of interfaces for efficient attachment of new kinds of non-volatile memory and purpose-built compute accelerators to processor pipelines. Early integrated microprocessors exposed an off-chip front-side bus to which discrete memory and peripheral controllers could attach in a standardized fashion. With the advent of symmetric multiprocessing and deep caches, this direct connection, together with memory controllers, has been implemented primarily using proprietary on-die technology. Proprietary interconnects and protocols hinder architectural innovation and are at odds with the open nature of the rapidly growing RISC-V movement.
In this talk I will describe Western Digital's efforts to rekindle architectural innovation by popularizing OmniXtend, a fully open coherence protocol meant to restore unrestricted interoperability of heterogeneous compute engines with a wide variety of memory and storage technologies. OmniXtend supports a four-hop MESI protocol and is designed to take advantage of a new wave of Ethernet switches with stateful and programmable data planes to facilitate system scalability. Ethernet transport was selected as a starting point for its ubiquity and historic resilience to reduce barriers to entry at modern bandwidths and latencies. Moreover, it allows us to build upon a vibrant ecosystem of hardware and IP, and to provide a boost to architectural innovation through the use of field-reconfigurable networking hardware. I will illustrate protocol operation and show performance measurements of the first ever NUMA RISC-V system prototype, which is downloadable today for deployment on FPGA.
About the speaker
Dr. Dejan Vucinic is Director of R&D Engineering at Western Digital Research in San Jose, California. His group has been exploring the impact of emerging non-volatile memories, such as MRAM, ReRAM and PCM, on computer systems architecture. Dejan was a summer intern at the L3 experiment at CERN in 1992, and earned his Ph.D. in experimental particle physics at MIT in 1999 under the direction of Prof. Sphicas.