FINN is an open-source experimental framework from Xilinx Research Labs to explore deep neural network inference on FPGAs. It specifically targets quantized neural networks, with emphasis on generating high-performance dataflow-style architectures customized for each network. This talk will introduce the various components of the framework, including the PyTorch-based quantization-aware training library Brevitas, the ONNX-based intermediate representation, the optimized Vivado HLS component library and the FINN compiler for taking trained networks down to FPGA hardware. As a relevant use case, we will share results achieved on a jet tagging dataset with low-bit networks using both FINN and a novel co-design approach that yields highly efficient FPGA NN implementations.
M. Girone, M. Elsing, L. Moneta, M. Pierini