Fast sampling ADCs:
- Tom Levens (Fast BCT)
- SPS and LHC ring and transfer-line Fast BCTs
- DAB/IBMS original electronics with dedicated firmware
- Limitations found on IBMS multiplexed and less than 25nsec integration
- Now based on VFC and FMC1000 with sampling at 650 MSPS
- Low and high gain signals acquired in parallel
- Firmware 'BCTFDI' available on BI GITlab
- Block diagram from ADC to data buffers
- Synchronisation based on external BST signals (turn and bunch clocks)
- Raw, bunch-by-bunch and sum/sum buffers available
- Continuous (ring) vs triggered (transfer-line) acquisition modes
- New firmware features required for SPS transfer-line application (Summer 2020)
- Split functionalities between Fast BCT and Diamond BLM
- Main arguments for using standard VFC project (BI digital designer work)
- Small utilities available (details pending)
- Main features for diamond BLM to be detailed (Eva)
- David Belohrad (LIU-BWS acquisition firmware)
- 4-channel fast sampling ADCs (Bluewave and IAM FMC) for PMTs
- Total order contains 60 pieces - first delivery from IAM expected soon
- FMC PCB layout on slide 5, PLL clocks from internal crystal
- Main challenge is storing data for all channels at 520MHz. Data reduction/compression used
- Likely two versions of the firmware (PSB/PS and SPS/LHC) with BST or not
- For SPS/LHC case look with interlock BPM team at implementation details
- Hope to have working firmware for PSB/PS by early August 2020 (limited number of ADCs)
BLM tunnel crate update - controller card (William Vigano)
- Update with new list of functions requested
- Change of back plane connector require new PCB
- Fruitful collaboration with BE-CO for nanoFIP module
- For shared use BLM/BPM need to agree on protocol
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