Eva Calvo Giraldo
(CERN)
04/12/2020, 09:00
FPGA control of the analogue circuit and its verification
David Medina Godoy
(CERN)
04/12/2020, 09:25
SW interlocks, BLMSYNC, UCAP/NXCALS, OP applications, ALARMS, RBAC/MCS
David Medina Godoy
(CERN),
Mathieu Saccani
(CERN)
04/12/2020, 09:40
Completed checks and future plans