Speaker
Daniel Hynds
(University of Glasgow-Unknown-Unknown)
Description
With the start-up of the LHC the LHCb experiment has successfully launched its programme towards its goals of discovery and precision measurements in the flavour physics sector. Nominal luminosity running for LHCb was already reached at the end of 2010, and the first phase of this programme is expected to be completed within 5 years of data taking. After this there is an opportunity for LHCb to increase its data taking abilities by an order of magnitude, by running at an increased luminosity and with a more efficient trigger. This upgrade strategy runs independently, but is compatible with, the planned LHC luminosity increases. The performance enhancement will be achieved by modifying the electronics architecture to be able to readout the entire detector at 40 MHz and perform all trigger algorithms in software. One of the implications of this scheme is the need to completely replace the silicon vertex detector of LHCb, or VELO, with new silicon modules with an upgraded ASIC. In addition the new detector must be more radiation hard and more segmented in order to cope with the increased particle flux. As one option a new readout ASIC is being developed, dubbed VELOPix, which is based on the Timepix/Medipix family of chips. We describe the R&D steps which are currently in place to develop the new chip and the associated upgraded pixel vertex detector. In order to investigate the performance of the sensor and module prototypes, a particle tracking telescope based on the current Timepix chip has been developed. Using the telescope a best resolution for angled tracks of 4 micron was measured with a planar sensor hybrid Timepix device. The performance of this telescope and results from the devices tested will be shown.
Author
Daniel Hynds
(University of Glasgow-Unknown-Unknown)
