Speaker
Michael Cooney
(University of Hawaii)
Description
The next generation of vertexing detectors in collider experiments will require order of magnitude increases in readout speed and increased background rates. The CAP12 continues the evolution of a number of binary, 3T based pixel detector related technologies at the University of Hawaii to address readout speed, density requirements, and background rate issues. The CAP12 takes the HIXEL readout method developed at UH and combines it with faster digital logic, column based threshold biasing, and manufactured on a 0.2μm SOI CMOS technology. Pixel size has been reduced to 30μm by 30μm and on die threshold DACs are intended to improve analog performance and biasing. The chip architecture is presented as well as simulations and preliminary results.
Author
Michael Cooney
(University of Hawaii)
Co-author
Prof.
Gary Varner
(University of Hawaii)
