TWEPP 2021 User Group meetings
All sessions are held remotely
and will be made available via ZOOM with the link available from the agenda page.
The following sessions will be held:
- Microelectronics (October 5, 2021, 14:00 CEST)
- Opto-electronics (September 27, 2021, 14:00 CEST)
- FPGA (December, 2021, exact date will be announced later)
The link to this page can be found here:
The detailed agenda pages can be found here:
For questions related to the working groups or if you would like to contribute, please contact the working group conveners.
For general questions please contact: email@example.com
Description of the working groups:
Convener: F. Vasey (Francois.Vasey@cern.ch)
The optical link working group meeting will consist of a sequence of four short sessions dedicated to LpGBT and VL+ components. Each session will start with a status report, followed by a Q&A discussion. Participants are encouraged to prepare and ask questions openly, especially if they are relevant to other users.
Convener: K. Kloukinas (Kostas.Kloukinas@cern.ch)
The Microelectronics User Group (MUG) meeting brings together fellow engineers from the High Energy Physics community in an open forum in which they could receive update information about supported technologies and EDA tools, share experiences, exchange ideas and discuss the specific needs of the community. Topical presentations in areas of common interest are also planned. The CERN CHIPS initiative, future technologies for HEP experiments and EDA software support by Europractice are some examples. There is no better place to receive update information, explore common challenges and network with colleagues (by e-mail and web conferencing platform this year).
Conveners: K. Wyllie (Ken.Wyllie@cern.ch),
S. Danzeca (Salvatore.Danzeca@cern.ch)
The working group will cover a range of topics related to the use of FPGAs in radiation environments, from methodology to recent results on new devices. On the wider usage of FPGAs, we will have an overview of issues related to the power management of large FPGAs on modules.