Speaker
Description
When researchers perform experiments on advanced SRAMs in order to assess their sensitivity against radiation, it is important to correctly classify the observed errors according to their multiplicity (Single Bit Upsets (SBUs), Multiple Cell Upsets (MCUs), etc). However, this might become a challenge in modern devices that implement mechanisms to detect and correct such errors (bit interleaving and Error Correcting Codes (ECC), amongst others). The reason is that this information is usually intellectual property (IP) of the manufacturers. In this talk we will discuss how this problem can be solved, even if said proprietary information is unknown to researchers. In addition, we will discuss the impact of error accumulation in experiments where too many bitflips are observed (due to a high particle flux, for example), and why the probability of observed so-called "false multiple events" is not negligible.
