Speaker
Description
A new era of high rate pixel sensors has now arrived, across the imaging community there are a number of new devices utilising multigigabit serializers to tackle the requirements for greater frame rates and pixel counts. At STFC two such systems are currently under development with ICs delivered and camera systems under development alongside chip characterisation. Hexitec-MHz for photon science and C100 in the field of electron microscopy. Both systems have data rates in excess of 80Gbps per die. But they are also just the start, precursors for another generation of systems using even faster serializers. With that in mind we have tried to develop a control and readout system that is scalable in both size and speed.
We will present the overall architecture for control and data flow in these new system, the hardware used, some discussion of the applications so far and how this will be developed further. We have also started to tackle issues further down steam of frame assembly and have developed examples of real time data processing and high performance disk writing.
Challenges and issues will be discuss along with the successes to date.
| Your name | Mr Matthew Hart |
|---|---|
| Institute | The Science and Technology Facilities Council |
| Email address | matthew.hart@stfc.ac.uk |
