Login

Implementing DRD7: an R&D Collaboration on Electronics and On-detector Processing. 2nd workshop

25–26 Sept 2023
CERN
Europe/Zurich timezone

Contribution List

23 out of 23 displayed
Export to PDF
  1. 1. Introduction
    Francois Vasey (CERN)
    25/09/2023, 14:00
  2. 2. 7.1.a Silicon Photonics Transceiver Development
    Jan Troska (CERN)
    25/09/2023, 14:45
  3. 3. 7.1.b Powering Next Generation Detector Systems
    Stefano Michelis (CERN)
    25/09/2023, 15:05
  4. 4. 7.1.c Wireless Allowing Data and Power Transmission
    cedric dehos
    25/09/2023, 15:25
  5. 7. Coffee Break
    25/09/2023, 15:45
  6. 21. 7.2.a eFPGA - Programmable Logic Array IP
    Michael Karagounis (Fachhochschule Dortmund Univ. of Applied Sciences and Arts (DE))
    25/09/2023, 16:15
  7. 9. 7.2.b Radiation Tolerant RISC-V Processor
    Kostas Kloukinas (CERN), Levi Mariën (KU Leuven)
    25/09/2023, 16:30
  8. 10. 7.2.c Virtual Electronic System Prototyping
    Davide Ceresa (CERN), Jashandeep Dhaliwal (CERN)
    25/09/2023, 16:50
  9. 11. 7.3.a High Performance TDC and ADC Blocks at Ultra-low Power
    25/09/2023, 17:10
  10. 12. 7.3.b Timing Measurements and Distribution
    25/09/2023, 17:30
  11. 13. 7.4.a Modeling and Development of Cryogenic CMOS PDKs
    Manuel Rolo (Universita e INFN Torino (IT))
    26/09/2023, 08:30
  12. 14. 7.4.b Radiation Resistance of Advanced CMOS Nodes
    26/09/2023, 08:50
  13. 15. 7.4.c Cooling and Cooling Plates
    26/09/2023, 09:10
  14. 17. 7.5.a COTS Architectures, Tools and IP
    26/09/2023, 09:30
  15. 20. 7.5.b No Backend, Full 100GbE Solutions from FE to DAQ
    26/09/2023, 09:50
  16. 22. 7.5.c Generic Backend Board
    26/09/2023, 10:10
  17. 8. Coffee Break
    26/09/2023, 10:30
  18. 18. 7.6.a Common Access to Selected Imaging Technologies and IP Blocks: a) TPSCo and TJ
    Iain Sedgwick
    26/09/2023, 11:00
  19. 23. 7.6.a Common Access to Selected Imaging Technologies and IP Blocks: b) LFoundry
    Manuel Rolo (Universita e INFN Torino (IT))
    26/09/2023, 11:15
  20. 19. 7.6.b Common Access to 3D and Advanced Integration
    Dr Michele Caselle (KIT - Karlsruhe Institute of Technology (DE))
    26/09/2023, 11:30
  21. 6. Discussion about R&D for Data Density
  22. 16. On-detector cooling systems based on low-mass carbon dioxide evaporators
  23. 5. Prospects on High data rate ASICs