Speaker
Description
The ePIC silicon vertex tracker (SVT) will consist of 5 barrel layers in addition to 5 disks at each end. The outer two barrel layers, at radii of 270 mm (L3) and 420 mm (L4), comprise the outer barrel (OB). All parts of the SVT will have to satisfy extremely low material targets, which are 0.25% X0 for L3 and 0.55% X0 for L4. One ingredient to achieve this goal are ultra-thin (40-50 μm) MAPS sensors.
The ePIC SVT will use a reduced size version of the MOSAIX MAPS sensor originally developed for the ALICE ITS3 detector. These large area sensors (LAS) will be thinned-down sensors (40 μm) which are ~20 mm wide and either ~110 or ~130 mm long.
Mechanically, the outer layers will be segmented into staves. Currently, we are envisaging staves that are two sensors wide and support in total 8 sensors (L3) or 16 sensors (L4), with a total power per stave of about 35 W (L3) or 50 W (L4). To reduce structural material the silicon will be self-supporting, which is achieved by a curvature of the silicon.
To reduce service material, the aspiration is to use serial powering and cool the detector elements with air flow. The former requires a separate ancillary chip, which generates significant amounts of heat, and needs to be considered as part of the thermal management. For the latter we plan to rely primarily on forced air flow in the core of the stave.
We are currently in an early design phase, with prototyping planned for middle of 2024, and the submission of a TDR by the end of this year.
In this talk we will present the preliminary design for these staves, and results from mechanical and thermal FEA, including CFD of the airflow in the stave core.