Speakers
Description
High-voltage CMOS Pixel technology is being considered for future Higgs factory experiments. The ATLASPix3.1 chip, with a pitch of 50μm x 150μm, fabricated using TSI 180nm HV-CMOS technology, is a full reticle-size monolithic HV-CMOS sensor with shunt-low dropout regulators that allow serial powering for multiple sensors. A beam test was conducted at DESY using 3-6 GeV positron beams, with chips operated in triggerless readout mode with zero suppression, demonstrating multi-chip capability. This was further evaluated with hadron beams, both with and without the built-in power regulators. This talk summarises the electrical characterisations and test beam results of ATLASPix3.1 sensors.
Summary (500 words)
High-voltage CMOS (HV-CMOS) technology is one of the latest technologies used for tracking detectors. They provide cost-effective high radiation tolerance, fast charge collection and low power consumption. HV-CMOS is a full commercial process that is suitable for large-area applications. The integrated sensor and readout design also allow for much easier detector assembly, compared to the hybrid pixel detector technology. These advantages make them one of the promising solutions for particle tracking detector development in high-energy physics experiments.
ATLASPix3.1 chip is the first full reticle-size monolithic HV-CMOS sensor including two shunt low-dropout regulators. It comprises 49,000 pixels with a pitch of 50μm x 150μm, fabricated using TSI 180nm HV-CMOS technology. The shunt-LDO regulators enable chip operation via serial powering. Serial powering allows for the usage of a single, constant current source to operate the chips in a chain to reduce total power consumption. Additionally, the readout architecture of ATLASPix3.1 supports both triggered and triggerless readout with zero suppression.
A four-layer telescope including four ATLASPix3.1 chips was developed, using the Generic Configuration and Control (GECCO) readout system. To assess the multi-chip capability and characterise its performance, a beam test was performed at DESY employing 3-6 GeV positron beams, during which the chips were operated in triggerless readout mode with zero suppression. Furthermore, the detector performance has also been tested with hadron beams, operating under conditions both with and without built-in power regulators.
This contribution provides an in-depth analysis of test beam data obtained from 3-6 GeV positron beam and hadron beams, highlighting results about four-layer ATLASpix3.1 telescope layouts both with and without integrated power regulation mechanisms. Specifically, the analysis focuses on examining the distribution of charge and cluster size, spatial resolution, and the efficiency of hit detection. This will also include selected preliminary results on the performance of the shunt-LDO regulators and serial-powered module structure.
